Digital video cameras capture frames at a frame rate and with a frame resolution by help of an image capturing device being for instance a complementary metal-oxide semiconductor (CMOS) or a charge coupled device (CCD). The frame rate and the frame resolution result in a capture data rate.
For professional applications, frame rate and resolution need to be high. Additionally, compression is not well accepted in live production capture or digital cinematography workflows. So, the capture data rate of professional video equipment and, thus, the data rate of the data stream produced by such professional video equipment are high as well.
Captured frames need to be stored. For storage in real-time, the storage data rate has to meet the capture data rate. But, commonly used slow memorizing devices like solid state memories (e.g. flash memories, phase change random access memories or magneto-resistive random access memories) do have storage data rates which are significantly lower than said high capture data rate resulting in professional applications.
Therefore, a solid state memory device set comprising several solid state memory devices is used. The solid state memory devices in the memory device set are provided with data in parallel. So, the storage data rate of the memory device set equals the cumulated storage data rates of the solid state memory devices comprised in said memory device set.
For synchronizing purposes the solid state memory device set is hosted in a device for real-time streaming which comprises receiving means for receiving a data stream, e.g. from the video camera's image capturing device. For synchronization, received data is buffered in a cache buffer, for instance a dynamic random access memory (DRAM), prior to being transferred to one of the solid state memory device set by a bus.
Solid state memory devices commonly comprise one or more solid state memory dies, also called memory units, adapted for writing data in fixed data amount units, so-called pages. To do so, each memory die may be equipped with or comprise a page buffer (e.g. SRAM) into which a data amount corresponding one page is copied from the cache buffer in a burst which takes a page-receiving-time t_r. After copying one page, the solid state memory die becomes inaccessible for a page-writing-time wrt_tm which is the time it takes to write the received page from page buffer to the solid state memory unit.
Video productions more and more produces several data streams in parallel, e.g. an audio stream and a video stream or, for 3D video, a main video stream and one or 30 more satellite video streams or a main video stream and a depth data stream, to name a few, each coming along with an individual data rate.
If the individual data rates are known in advance and fixed, optimized hardware layout as well as an associated bus control method is easy to achieve.
But, if data rates or their variations are not known in advance or if even the number of streams to be handled is unknown, specification of optimized hardware layout for the device for real-time streaming as well as corresponding bus control method is an unsolved problem not even published in the art, yet.